Circuit
Component values
The stiffness slider scales R1 and R2 together, so the Thévenin bias voltage stays put and only the source resistance Rb seen by the base changes. For a bipolar that is not a cosmetic change: Rb/β adds directly to the ohms in the emitter path and therefore stabilises the bias exactly as RE does.
Device parameters
Display options
Operating point & gain
What you are looking at
The output characteristics of the device (output current versus output voltage) for a family of input voltages, together with the load line set by VDD and RC/RD.
The operating point is where the load line crosses the curve belonging to the actual bias input voltage. When a signal is applied, the operating point slides along the load line; the highlighted segment is the swing for the current signal amplitude.
All sliders from the Amplifier tab apply here too — the two views always show the same circuit.
Swing budget
Head-room is the distance from the operating point to clipping. Symmetric head-room gives the largest undistorted output.
How to use these
Each exercise sets the circuit up for you. Press Set up, switch to the Amplifier (or Load line) tab, look at what happens, form an opinion, and only then reveal the answer.
The model behind the plots
Bipolar transistor
IC = IS · (eVBE/VT − 1) · (1 − e−VCE/VCE,knee) , IB = IC/β , VT = kT/q
The last factor is a smooth stand-in for the saturation region: it is ≈1 in the active region and forces IC→0 as VCE→0, so the transistor can never pull the collector below ground. Tick neglect saturation to drop it and see the unphysical result the plain exponential predicts.
Temperature
IS(T) = IS(300K) · (T/300)3 · exp[(T/300 − 1)·Eg/VT(T)] , Eg = 1.11 eV
This is the standard Gummel-Poon/SPICE law (XTI = 3). It is a very strong dependence: IS roughly doubles every 5 K, so it changes by about 8× over 10 K and by four decades between 300 K and 350 K. Differentiating IC = IS(T)eVBE/VT at constant IC gives the familiar
dVBE/dT = (VBE − Eg − 3VT)/T ≈ −1.8 mV/K
shown in the read-out. The MOS threshold is given the usual linear drift, VTH(T) = VTH(300K) − 2 mV/K · (T−300), which is mild by comparison; mobility drift is not modelled.
gm = IC/VT , rπ = β/gm , Av = −gmRC (RE bypassed) , Av = −gmRC/(1+gmRE) (not bypassed)
MOS transistor (square law)
saturation: ID = ½ k (VGS−VTH)2 triode: ID = k[(VGS−VTH)VDS − ½VDS2]
gm = √(2 k ID) = 2ID/(VGS−VTH) , Av = −gmRD (RS bypassed)
Bias solution
The DC operating point is found numerically: the device current is the only unknown, and everything else (VBE/VGS, the emitter/source voltage, the output voltage) follows from it. Because the resulting residual is monotonic in the current, a bisection converges to machine precision in ~80 steps — no linearisation, no convergence tricks, valid deep into clipping.
Signals
Coupling capacitors are treated as ideal at the signal frequency, so the input source adds directly to the DC base/gate voltage and the output capacitor removes the DC level. The waveform is then computed point by point with the full non-linear model — which is exactly why you can see the asymmetry and the clipping that a small-signal calculation cannot show. Distortion is measured by integrating the harmonics of the computed output waveform (THD over harmonics 2–9).
Ported from the Java applets CEC.jar / CECFB.jar (ICD group, University of Twente). Same physics, plus MOS, load-line view, distortion measurement and exercises.